Commit f7d9e147a05e9d0cf104a9cb9ee2b3bf863347de
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025ff1a6
display.vhd
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7Segment_display/display.vhd
@@ -44,7 +44,7 @@ end display; | @@ -44,7 +44,7 @@ end display; | ||
44 | 44 | ||
45 | architecture Behavioral of display is | 45 | architecture Behavioral of display is |
46 | 46 | ||
47 | -signal count_int : integer range 3 downto 0 := 0; | 47 | +signal count_an : integer range 3 downto 0 := 0; |
48 | signal clk_enable : integer range 4999 downto 0 := 0; | 48 | signal clk_enable : integer range 4999 downto 0 := 0; |
49 | signal clk_counter : integer range 2999999 downto 0 := 0; | 49 | signal clk_counter : integer range 2999999 downto 0 := 0; |
50 | constant nb0 : std_logic_vector(7 downto 0) := "11000000"; | 50 | constant nb0 : std_logic_vector(7 downto 0) := "11000000"; |
@@ -77,22 +77,22 @@ begin | @@ -77,22 +77,22 @@ begin | ||
77 | -- clock d'affichage | 77 | -- clock d'affichage |
78 | if clk_enable = 4999 then | 78 | if clk_enable = 4999 then |
79 | clk_enable <= 0; | 79 | clk_enable <= 0; |
80 | - if count_int = 0 then | 80 | + if count_an = 0 then |
81 | aff <= numbers(chiffre4); | 81 | aff <= numbers(chiffre4); |
82 | an <= seg0; | 82 | an <= seg0; |
83 | - count_int <= count_int + 1; | ||
84 | - elsif count_int = 1 then | 83 | + count_an <= count_an + 1; |
84 | + elsif count_an = 1 then | ||
85 | aff <= numbers(chiffre3); | 85 | aff <= numbers(chiffre3); |
86 | an <= seg1; | 86 | an <= seg1; |
87 | - count_int <= count_int + 1; | ||
88 | - elsif count_int = 2 then | 87 | + count_an <= count_an + 1; |
88 | + elsif count_an = 2 then | ||
89 | aff <= numbers(chiffre2); | 89 | aff <= numbers(chiffre2); |
90 | an <= seg2; | 90 | an <= seg2; |
91 | - count_int <= count_int + 1; | ||
92 | - elsif count_int = 3 then | 91 | + count_an <= count_an + 1; |
92 | + elsif count_an = 3 then | ||
93 | aff <= numbers(chiffre1); | 93 | aff <= numbers(chiffre1); |
94 | an <= seg3; | 94 | an <= seg3; |
95 | - count_int <= 0; | 95 | + count_an <= 0; |
96 | end if; | 96 | end if; |
97 | else | 97 | else |
98 | clk_enable <= clk_enable + 1; | 98 | clk_enable <= clk_enable + 1; |
@@ -130,4 +130,4 @@ begin | @@ -130,4 +130,4 @@ begin | ||
130 | end if; | 130 | end if; |
131 | end if; | 131 | end if; |
132 | end process; | 132 | end process; |
133 | -end Behavioral; | 133 | -end Behavioral; |
134 | +end Behavioral; | ||
134 | \ No newline at end of file | 135 | \ No newline at end of file |