Commit bb38f35fe0b3b8ad6fa3f0e47148290635f5b15f
1 parent
0ad2b0a8
Test ADC effectué avec succès
Par Thomas
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1 | +.equ PINA = 0x00 ; définition des adresses des ports | |
2 | +.equ DDRA = 0x01 | |
3 | +.equ PORTA = 0x02 | |
4 | +.equ PINC = 0x06 | |
5 | +.equ DDRC = 0x07 | |
6 | +.equ PORTC = 0x08 | |
7 | + | |
8 | +.equ TTCR0A = 0x24 ; Initialisation du timer | |
9 | +.equ TTCR0B = 0x25 | |
10 | +.equ TMSK0 = 0x6e | |
11 | + | |
12 | +.equ SREG = 0x3F | |
13 | +.equ RAMEND = 0x21FF | |
14 | +.equ SPH = 0x3E ; initialisation de la pile | |
15 | +.equ SPL = 0x3D | |
16 | + | |
17 | +.equ ADMUX = 0x7C | |
18 | +.equ ADCSRB = 0x7B | |
19 | +.equ ADCSRA = 0x7A | |
20 | +.equ ADCH = 0x79 | |
21 | + | |
22 | +.def selAfficheur = r19 | |
23 | +.def tmp = r20 | |
24 | +.def val = r21 | |
25 | +.def aff0 = r5 | |
26 | +.def aff1 = r1 | |
27 | +.def aff2 = r2 | |
28 | +.def aff3 = r3 | |
29 | + | |
30 | +.org 0x000 | |
31 | + ; Vecteur RESET | |
32 | + jmp debut | |
33 | + | |
34 | +.org 0x002e | |
35 | + ; Vecteur TIMER0 | |
36 | + jmp tmr | |
37 | + | |
38 | +.org 0x003A ; ADC | |
39 | + jmp adc | |
40 | + | |
41 | +.org 0x0080 | |
42 | +afficheur: | |
43 | + .DB 0x3F, 0x30, 0x6D, 0x79, 0x72, 0x5B, 0x5F, 0x31, 0x7F, 0x7B, 0x77, 0x40, 0x4c, 0x7c, 0x4f, 0x47, 0x40, 0x76, 0x04, 0x3c, 0x40, 0x0E, 0x37, 0x54, 0x5c, 0x40, 0x40, 0x44, 0x5b, 0x4e, 0x1c, 0x1c, 0x40, 0x40, 0x40, 0x40, 0x63, 0x00 | |
44 | + ; 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q, r, s, t, u, v, w, x, y, z, °, space | |
45 | + | |
46 | + | |
47 | +debut: | |
48 | + SREG <- 0b10000000 | |
49 | + DDRA@IO <- 0xFF | |
50 | + DDRC@IO <- 0xFF | |
51 | + TTCR0A@IO <- 0x01 | |
52 | + TTCR0B@IO <- 0x03 | |
53 | + TMSK0 <- 0x01 | |
54 | + selAfficheur <- 0x01 | |
55 | + | |
56 | + ADMUX <- 0b01100000 | |
57 | + ADCSRB <- 0b00000010 | |
58 | + ADCSRA <- 0b11011110 | |
59 | + | |
60 | + PORTA@IO <- 0xAA | |
61 | + PORTC@IO <- 0x00 | |
62 | + SEI | |
63 | + | |
64 | +boucle: | |
65 | + ; On attend et on recommence | |
66 | + saut boucle | |
67 | + | |
68 | + | |
69 | +tempo: | |
70 | + ldi r24,8 | |
71 | +tempoA: | |
72 | + subi r22,1 | |
73 | + sbci r23,0 | |
74 | + sbci r24,0 | |
75 | + brcc tempoA | |
76 | + ret | |
77 | + | |
78 | +adc: | |
79 | + | |
80 | + val <- ADCH | |
81 | + aff0 <- val/1-(val/10)*10 | |
82 | + aff1 <- val/10-(val/100)*10 | |
83 | + aff2 <- val/100 | |
84 | + aff3 <- 0 | |
85 | + ADCSRA <- 0b11011101 | |
86 | + reti | |
87 | + | |
88 | + | |
89 | +tmr: | |
90 | + lsl selAfficheur | |
91 | + si selAfficheur > 8 alors selafficheur <- 1 | |
92 | + portc@IO <- 0xff - selAfficheur | |
93 | + | |
94 | + si selAfficheur == 1 alors porta@IO <- afficheur@ROM[aff0] | |
95 | + si selAfficheur == 2 alors porta@IO <- afficheur@ROM[aff1] | |
96 | + si selAfficheur == 4 alors porta@IO <- afficheur@ROM[aff2] | |
97 | + si selAfficheur == 8 alors porta@IO <- afficheur@ROM[aff3] | |
98 | + reti | |
99 | + | ... | ... |