irq_arch.c
1.98 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
/*
* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_atmega_common
* @{
*
* @file
* @brief Implementation of the kernels irq interface
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include <stdio.h>
#include "arch/irq_arch.h"
#include "cpu.h"
/**
* @brief Macro returns state of the global interrupt register
*/
static uint8_t __get_interrupt_state(void);
static void __set_interrupt_state(uint8_t state);
volatile uint8_t __in_isr = 0;
__attribute__((always_inline)) static inline uint8_t __get_interrupt_state(void)
{
uint8_t sreg;
__asm__ volatile("in r0, __SREG__; \n\t"
"mov %0, r0 \n\t"
: "=g"(sreg)
:
: "r0");
return sreg & (1 << 7);
}
__attribute__((always_inline)) inline void __set_interrupt_state(uint8_t state)
{
__asm__ volatile("mov r15,%0; \n\t"
"in r16, __SREG__; \n\t"
"cbr r16,7; \n\t"
"or r15,r16; \n\t"
"out __SREG__, r15 \n\t"
:
: "g"(state)
: "r15", "r16");
}
/**
* @brief Disable all maskable interrupts
*/
unsigned int irq_arch_disable(void)
{
uint8_t mask = __get_interrupt_state();
cli();
return (unsigned int) mask;
}
/**
* @brief Enable all maskable interrupts
*/
unsigned int irq_arch_enable(void)
{
sei();
return __get_interrupt_state();
}
/**
* @brief Restore the state of the IRQ flags
*/
void irq_arch_restore(unsigned int state)
{
__set_interrupt_state(state);
}
/**
* @brief See if the current context is inside an ISR
*/
int irq_arch_in(void)
{
return __in_isr;
}