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TP_VGA/TP_VGA.srcs/sources_1/new/VGA_vhdl.v deleted
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| 1 | -`timescale 1ns / 1ps | ||
| 2 | -////////////////////////////////////////////////////////////////////////////////// | ||
| 3 | -// Company: | ||
| 4 | -// Engineer: | ||
| 5 | -// | ||
| 6 | -// Create Date: 04.10.2023 16:23:46 | ||
| 7 | -// Design Name: | ||
| 8 | -// Module Name: VGA_vhdl | ||
| 9 | -// Project Name: | ||
| 10 | -// Target Devices: | ||
| 11 | -// Tool Versions: | ||
| 12 | -// Description: | ||
| 13 | -// | ||
| 14 | -// Dependencies: | ||
| 15 | -// | ||
| 16 | -// Revision: | ||
| 17 | -// Revision 0.01 - File Created | ||
| 18 | -// Additional Comments: | ||
| 19 | -// | ||
| 20 | -////////////////////////////////////////////////////////////////////////////////// | ||
| 21 | - | ||
| 22 | - | ||
| 23 | -module VGA_vhdl( | ||
| 24 | - input Clk_sys, | ||
| 25 | - input Reset, | ||
| 26 | - input B1, | ||
| 27 | - input B2, | ||
| 28 | - input B3 | ||
| 29 | - ); | ||
| 30 | -endmodule |