GITLAB
bilalelhasnaoui
/
Travaux_pratiques_VHDL
Toggle navigation
Sign in
Sign in
Project
Files
Commits
Network
Graphs
Issues
0
Merge Requests
0
Wiki
master
231d00d3387b94551d4d93e69e45358d322bcea0
Travaux_pratiques_VHDL
Afficheur_7SEG
Afficheur_7SEG.runs
impl_1
init_design.pb
231d00d3
Les deux application 7segment et VGA control avec Basys3 FPGA
Browse Code ยป
bilalelhasnaoui
2023-10-30 00:37:51 +0100
init_design.pb
2.29 KB
Raw
History
Download (2.29 KB)
