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projetSC/FPGA/ProjectOutputs/Default - All Constraints/projet_sc.npl 205 Bytes
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  JDF G

  PROJECT  projet_sc

  DESIGN   projet_sc

  DEVFAM   Spartan3

  DEVICE   XC3S1500

  DEVPKG   FG676

  DEVSPEED 4

  DEVTOPLEVELMODULETYPE EDIF

  SOURCE   projet_sc.EDF

  DEPASSOC projet_sc projet_sc_BUILD.ucf