Release 14.3 ngdbuild P.40xd (nt64)
Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.

Command Line: C:\Xilinx\14.3\ISE_DS\ISE\bin\nt64\unwrapped\NGDBuild.exe -p
XC3S1500-FG676-4 -dd
c:\users\altium7\documents\csaadvandamme\fpga_projet\projectoutputs\default -
all constraints\_ngo -aul -uc
C:\Users\Altium7\Documents\csaadVandamme\FPGA_projet\ProjectOutputs\Default -
All Constraints\FPGA_projet.ucf -nt on -a fpga_projet.edf fpga_projet.ngd

Executing edif2ngd -a -aul "fpga_projet.edf"
"c:\users\altium7\documents\csaadvandamme\fpga_projet\projectoutputs\default -
all constraints\_ngo\fpga_projet.ngo"
Release 14.3 - edif2ngd P.40xd (nt64)
Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.
INFO:NgdBuild - Release 14.3 edif2ngd P.40xd (nt64)
INFO:NgdBuild - Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.
Adding pads to all top level port signals...
Writing module to
"c:/users/altium7/documents/csaadvandamme/fpga_projet/projectoutputs/default -
all constraints/_ngo/fpga_projet.ngo"...
Reading NGO file
"c:/users/altium7/documents/csaadvandamme/fpga_projet/projectoutputs/default -
all constraints/_ngo/fpga_projet.ngo" ...
Executing edif2ngd -noa -aul "CD4CES.edn"
"c:\users\altium7\documents\csaadvandamme\fpga_projet\projectoutputs\default -
all constraints\_ngo\CD4CES.ngo"
Release 14.3 - edif2ngd P.40xd (nt64)
Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.
INFO:NgdBuild - Release 14.3 edif2ngd P.40xd (nt64)
INFO:NgdBuild - Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.
Writing module to
"c:/users/altium7/documents/csaadvandamme/fpga_projet/projectoutputs/default -
all constraints/_ngo/CD4CES.ngo"...
Loading design module
"c:\users\altium7\documents\csaadvandamme\fpga_projet\projectoutputs\default -
all constraints\_ngo\CD4CES.ngo"...
Executing edif2ngd -noa -aul "CLKGEN.edn"
"c:\users\altium7\documents\csaadvandamme\fpga_projet\projectoutputs\default -
all constraints\_ngo\CLKGEN.ngo"
Release 14.3 - edif2ngd P.40xd (nt64)
Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.
INFO:NgdBuild - Release 14.3 edif2ngd P.40xd (nt64)
INFO:NgdBuild - Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.
Writing module to
"c:/users/altium7/documents/csaadvandamme/fpga_projet/projectoutputs/default -
all constraints/_ngo/CLKGEN.ngo"...
Loading design module
"c:\users\altium7\documents\csaadvandamme\fpga_projet\projectoutputs\default -
all constraints\_ngo\CLKGEN.ngo"...
Gathering constraint information from source properties...
Done.

Annotating constraints to design from ucf file
"C:/Users/Altium7/Documents/csaadVandamme/FPGA_projet/ProjectOutputs/Default -
All Constraints/FPGA_projet.ucf" ...
Resolving constraint associations...
Checking Constraint Associations...
Done...

Checking expanded design ...

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 172716 kilobytes

Writing NGD file "fpga_projet.ngd" ...
Total REAL time to NGDBUILD completion:  13 sec
Total CPU time to NGDBUILD completion:   3 sec

Writing NGDBUILD log file "fpga_projet.bld"...