.model Configurable_U5UNIVERSAL_DIGITAL_IO_DATAREG_INOUT_WR_16_ .inputs Rst .inputs ResetValue<15> .inputs ResetValue<14> .inputs ResetValue<13> .inputs ResetValue<12> .inputs ResetValue<11> .inputs ResetValue<10> .inputs ResetValue<9> .inputs ResetValue<8> .inputs ResetValue<7> .inputs ResetValue<6> .inputs ResetValue<5> .inputs ResetValue<4> .inputs ResetValue<3> .inputs ResetValue<2> .inputs ResetValue<1> .inputs ResetValue<0> .inputs clk .inputs clken .inputs enable .inputs enable_write .inputs si .inputs shift .inputs update .inputs regin<15> .inputs regin<14> .inputs regin<13> .inputs regin<12> .inputs regin<11> .inputs regin<10> .inputs regin<9> .inputs regin<8> .inputs regin<7> .inputs regin<6> .inputs regin<5> .inputs regin<4> .inputs regin<3> .inputs regin<2> .inputs regin<1> .inputs regin<0> .outputs regout<15> .outputs regout<14> .outputs regout<13> .outputs regout<12> .outputs regout<11> .outputs regout<10> .outputs regout<9> .outputs regout<8> .outputs regout<7> .outputs regout<6> .outputs regout<5> .outputs regout<4> .outputs regout<3> .outputs regout<2> .outputs regout<1> .outputs regout<0> .outputs so .loc Configurable_U5.VHD 603 sh_reg<9> .latch n12 sh_reg<9> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<10> .latch n11 sh_reg<10> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<11> .latch n10 sh_reg<11> re clk 2 n222 .names enable clken n222 11 1 .names shift n5 0 1 .names si n5 regin<15> n6 11- 1 -01 1 .names sh_reg<15> n5 regin<14> n7 11- 1 -01 1 .names sh_reg<14> n5 regin<13> n8 11- 1 -01 1 .names sh_reg<13> n5 regin<12> n9 11- 1 -01 1 .names sh_reg<12> n5 regin<11> n10 11- 1 -01 1 .names sh_reg<11> n5 regin<10> n11 11- 1 -01 1 .names sh_reg<10> n5 regin<9> n12 11- 1 -01 1 .names sh_reg<9> n5 regin<8> n13 11- 1 -01 1 .names sh_reg<8> n5 regin<7> n14 11- 1 -01 1 .names sh_reg<7> n5 regin<6> n15 11- 1 -01 1 .names sh_reg<6> n5 regin<5> n16 11- 1 -01 1 .names sh_reg<5> n5 regin<4> n17 11- 1 -01 1 .names sh_reg<4> n5 regin<3> n18 11- 1 -01 1 .names sh_reg<3> n5 regin<2> n19 11- 1 -01 1 .names sh_reg<2> n5 regin<1> n20 11- 1 -01 1 .names sh_reg<1> n5 regin<0> n21 11- 1 -01 1 .names Rst ResetValue<15> n124 11 1 .loc Configurable_U5.VHD 603 sh_reg<14> .latch n7 sh_reg<14> re clk 2 n222 .names update enable n57 11 1 .names n57 enable_write n225 11 1 .names Rst ResetValue<14> n130 11 1 .names Rst ResetValue<13> n134 11 1 .names Rst ResetValue<12> n138 11 1 .names Rst ResetValue<11> n142 11 1 .names Rst ResetValue<10> n146 11 1 .names Rst ResetValue<9> n150 11 1 .names Rst ResetValue<8> n154 11 1 .names Rst ResetValue<7> n158 11 1 .names Rst ResetValue<6> n162 11 1 .names Rst ResetValue<5> n166 11 1 .names Rst ResetValue<4> n170 11 1 .names Rst ResetValue<3> n174 11 1 .names Rst ResetValue<2> n178 11 1 .names Rst ResetValue<1> n182 11 1 .names Rst ResetValue<0> n186 11 1 .loc Configurable_U5.VHD 603 sh_reg<8> .latch n13 sh_reg<8> re clk 2 n222 .names up_reg<15> regout<15> 1 1 .names up_reg<14> regout<14> 1 1 .names up_reg<13> regout<13> 1 1 .names up_reg<12> regout<12> 1 1 .names up_reg<11> regout<11> 1 1 .names up_reg<10> regout<10> 1 1 .names up_reg<9> regout<9> 1 1 .names up_reg<8> regout<8> 1 1 .names up_reg<7> regout<7> 1 1 .names up_reg<6> regout<6> 1 1 .names up_reg<5> regout<5> 1 1 .names up_reg<4> regout<4> 1 1 .names up_reg<3> regout<3> 1 1 .names up_reg<2> regout<2> 1 1 .names up_reg<1> regout<1> 1 1 .names up_reg<0> regout<0> 1 1 .names sh_reg<0> so 1 1 .names ResetValue<15> n125 0 1 .names Rst n125 n126 11 1 .loc Configurable_U5.VHD 603 sh_reg<12> .latch n9 sh_reg<12> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<13> .latch n8 sh_reg<13> re clk 2 n222 .names ResetValue<14> n131 0 1 .names Rst n131 n132 11 1 .names ResetValue<13> n135 0 1 .names Rst n135 n136 11 1 .names ResetValue<12> n139 0 1 .names Rst n139 n140 11 1 .names ResetValue<11> n143 0 1 .names Rst n143 n144 11 1 .names ResetValue<10> n147 0 1 .names Rst n147 n148 11 1 .names ResetValue<9> n151 0 1 .names Rst n151 n152 11 1 .names ResetValue<8> n155 0 1 .names Rst n155 n156 11 1 .names ResetValue<7> n159 0 1 .names Rst n159 n160 11 1 .names ResetValue<6> n163 0 1 .names Rst n163 n164 11 1 .names ResetValue<5> n167 0 1 .names Rst n167 n168 11 1 .names ResetValue<4> n171 0 1 .names Rst n171 n172 11 1 .names ResetValue<3> n175 0 1 .names Rst n175 n176 11 1 .names ResetValue<2> n179 0 1 .names Rst n179 n180 11 1 .names ResetValue<1> n183 0 1 .names Rst n183 n184 11 1 .names ResetValue<0> n187 0 1 .names Rst n187 n188 11 1 .loc Configurable_U5.VHD 603 sh_reg<7> .latch n14 sh_reg<7> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<6> .latch n15 sh_reg<6> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<5> .latch n16 sh_reg<5> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<4> .latch n17 sh_reg<4> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<3> .latch n18 sh_reg<3> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<2> .latch n19 sh_reg<2> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<1> .latch n20 sh_reg<1> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<0> .latch n21 sh_reg<0> re clk 2 n222 .loc Configurable_U5.VHD 603 sh_reg<15> .latch n6 sh_reg<15> re clk 2 n222 .loc Configurable_U5.VHD 620 up_reg<15> .latch sh_reg<15> up_reg<15> re clk 6 n124 n126 n225 .loc Configurable_U5.VHD 620 up_reg<14> .latch sh_reg<14> up_reg<14> re clk 6 n130 n132 n225 .loc Configurable_U5.VHD 620 up_reg<13> .latch sh_reg<13> up_reg<13> re clk 6 n134 n136 n225 .loc Configurable_U5.VHD 620 up_reg<12> .latch sh_reg<12> up_reg<12> re clk 6 n138 n140 n225 .loc Configurable_U5.VHD 620 up_reg<11> .latch sh_reg<11> up_reg<11> re clk 6 n142 n144 n225 .loc Configurable_U5.VHD 620 up_reg<10> .latch sh_reg<10> up_reg<10> re clk 6 n146 n148 n225 .loc Configurable_U5.VHD 620 up_reg<9> .latch sh_reg<9> up_reg<9> re clk 6 n150 n152 n225 .loc Configurable_U5.VHD 620 up_reg<8> .latch sh_reg<8> up_reg<8> re clk 6 n154 n156 n225 .loc Configurable_U5.VHD 620 up_reg<7> .latch sh_reg<7> up_reg<7> re clk 6 n158 n160 n225 .loc Configurable_U5.VHD 620 up_reg<6> .latch sh_reg<6> up_reg<6> re clk 6 n162 n164 n225 .loc Configurable_U5.VHD 620 up_reg<5> .latch sh_reg<5> up_reg<5> re clk 6 n166 n168 n225 .loc Configurable_U5.VHD 620 up_reg<4> .latch sh_reg<4> up_reg<4> re clk 6 n170 n172 n225 .loc Configurable_U5.VHD 620 up_reg<3> .latch sh_reg<3> up_reg<3> re clk 6 n174 n176 n225 .loc Configurable_U5.VHD 620 up_reg<2> .latch sh_reg<2> up_reg<2> re clk 6 n178 n180 n225 .loc Configurable_U5.VHD 620 up_reg<1> .latch sh_reg<1> up_reg<1> re clk 6 n182 n184 n225 .loc Configurable_U5.VHD 620 up_reg<0> .latch sh_reg<0> up_reg<0> re clk 6 n186 n188 n225