.model FPGA_projet
.attrib connectto 1 HDR_B-2
.attrib targetidalias 1 CLK_BRD
.inputs CLK_BRD
.attrib connectto 1 HDR_B-7
.attrib targetidalias 1 HA2
.outputs HA2
.attrib connectto 1 HDR_B-19
.attrib targetidalias 1 HA8
.outputs HA8
.attrib connectto 1 HDR_T-82
.attrib fpga_clock_allow_on_non_clock_pin 1 True
.attrib targetidalias 1 JTAG_NEXUS_TCK
.inputs JTAG_NEXUS_TCK
.attrib connectto 1 HDR_T-84
.attrib targetidalias 1 JTAG_NEXUS_TDI
.inputs JTAG_NEXUS_TDI
.attrib connectto 1 HDR_T-76
.attrib targetidalias 1 JTAG_NEXUS_TDO
.outputs JTAG_NEXUS_TDO
.attrib connectto 1 HDR_T-80
.attrib targetidalias 1 JTAG_NEXUS_TMS
.inputs JTAG_NEXUS_TMS