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fpga/FPGA_projet/ProjectOutputs/Default - All Constraints/_blf/cell0009_body.blf 830 Bytes
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  .model Configurable_U2

  .inputs D_B<7>

  .inputs D_B<6>

  .inputs D_B<5>

  .inputs D_B<4>

  .inputs D_B<3>

  .inputs D_B<2>

  .inputs D_B<1>

  .inputs D_B<0>

  .outputs Q_B<7>

  .outputs Q_B<6>

  .outputs Q_B<5>

  .outputs Q_B<4>

  .outputs Q_B<3>

  .outputs Q_B<2>

  .outputs Q_B<1>

  .outputs Q_B<0>

  .inputs C

  .names n1

  .loc Configurable_U2.VHD 23 Q_B<6>

  .latch D_B<6> Q_B<6> re C 2

  .loc Configurable_U2.VHD 23 Q_B<5>

  .latch D_B<5> Q_B<5> re C 2

  .loc Configurable_U2.VHD 23 Q_B<4>

  .latch D_B<4> Q_B<4> re C 2

  .loc Configurable_U2.VHD 23 Q_B<3>

  .latch D_B<3> Q_B<3> re C 2

  .loc Configurable_U2.VHD 23 Q_B<2>

  .latch D_B<2> Q_B<2> re C 2

  .loc Configurable_U2.VHD 23 Q_B<1>

  .latch D_B<1> Q_B<1> re C 2

  .loc Configurable_U2.VHD 23 Q_B<0>

  .latch D_B<0> Q_B<0> re C 2

  .loc Configurable_U2.VHD 23 Q_B<7>

  .latch D_B<7> Q_B<7> re C 2