.model Configurable_U5UNIVERSAL_DIGITAL_IO_TAPCONTROLLER

  .inputs tck

  .inputs tms

  .inputs tdi

  .inputs drsin

  .inputs trst

  .outputs tdo

  .outputs reset

  .outputs State_TLR

  .outputs controlen

  .outputs updateir

  .outputs dataen

  .outputs shiftdr

  .outputs clockdr

  .outputs updatedr

  .outputs exit1dr

  .outputs irout<3>

  .outputs irout<2>

  .outputs irout<1>

  .outputs irout<0>

  .outputs tapstate<3>

  .outputs tapstate<2>

  .outputs tapstate<1>

  .outputs tapstate<0>

  .inputs id_code_signal<31>

  .inputs id_code_signal<30>

  .inputs id_code_signal<29>

  .inputs id_code_signal<28>

  .inputs id_code_signal<27>

  .inputs id_code_signal<26>

  .inputs id_code_signal<25>

  .inputs id_code_signal<24>

  .inputs id_code_signal<23>

  .inputs id_code_signal<22>

  .inputs id_code_signal<21>

  .inputs id_code_signal<20>

  .inputs id_code_signal<19>

  .inputs id_code_signal<18>

  .inputs id_code_signal<17>

  .inputs id_code_signal<16>

  .inputs id_code_signal<15>

  .inputs id_code_signal<14>

  .inputs id_code_signal<13>

  .inputs id_code_signal<12>

  .inputs id_code_signal<11>

  .inputs id_code_signal<10>

  .inputs id_code_signal<9>

  .inputs id_code_signal<8>

  .inputs id_code_signal<7>

  .inputs id_code_signal<6>

  .inputs id_code_signal<5>

  .inputs id_code_signal<4>

  .inputs id_code_signal<3>

  .inputs id_code_signal<2>

  .inputs id_code_signal<1>

  .inputs id_code_signal<0>

  .names selectdi1 tapstate<3>

  1 1

  .names n1

  .names n2

  1

  .names n217 ins<3> n222

  1- 1

  -1 1

  .names n220 n88 n223

  1- 1

  -1 1

  .names clockdr1 clockdr

  1 1

  .names updatedr1 updatedr

  1 1

  .names updateir1 updateir

  1 1

  .names reset_c State_TLR

  1 1

  .names exit1dr1 exit1dr

  1 1

  .loc Configurable_U5.VHD 235

  .subckt Configurable_U5UNIVERSAL_DIGITAL_IO_DRNOOUT_32_ id_reg_unit clk=-id_reg_unit/clk si=-id_reg_unit/si inpvalue<31>=-id_reg_unit/inpvalue<31> inpvalue<30>=-id_reg_unit/inpvalue<30> inpvalue<29>=-id_reg_unit/inpvalue<29> inpvalue<28>=-id_reg_unit/inpvalue<28> inpvalue<27>=-id_reg_unit/inpvalue<27> inpvalue<26>=-id_reg_unit/inpvalue<26> inpvalue<25>=-id_reg_unit/inpvalue<25> inpvalue<24>=-id_reg_unit/inpvalue<24> inpvalue<23>=-id_reg_unit/inpvalue<23> inpvalue<22>=-id_reg_unit/inpvalue<22> inpvalue<21>=-id_reg_unit/inpvalue<21> inpvalue<20>=-id_reg_unit/inpvalue<20> inpvalue<19>=-id_reg_unit/inpvalue<19> inpvalue<18>=-id_reg_unit/inpvalue<18> inpvalue<17>=-id_reg_unit/inpvalue<17> inpvalue<16>=-id_reg_unit/inpvalue<16> inpvalue<15>=-id_reg_unit/inpvalue<15> inpvalue<14>=-id_reg_unit/inpvalue<14> inpvalue<13>=-id_reg_unit/inpvalue<13> inpvalue<12>=-id_reg_unit/inpvalue<12> inpvalue<11>=-id_reg_unit/inpvalue<11> inpvalue<10>=-id_reg_unit/inpvalue<10> inpvalue<9>=-id_reg_unit/inpvalue<9> inpvalue<8>=-id_reg_unit/inpvalue<8> inpvalue<7>=-id_reg_unit/inpvalue<7> inpvalue<6>=-id_reg_unit/inpvalue<6> inpvalue<5>=-id_reg_unit/inpvalue<5> inpvalue<4>=-id_reg_unit/inpvalue<4> inpvalue<3>=-id_reg_unit/inpvalue<3> inpvalue<2>=-id_reg_unit/inpvalue<2> inpvalue<1>=-id_reg_unit/inpvalue<1> inpvalue<0>=-id_reg_unit/inpvalue<0> shiftdr=-id_reg_unit/shiftdr enable=-id_reg_unit/enable so=+idout

  .names tck id_reg_unit/clk

  1 1

  .names tdi id_reg_unit/si

  1 1

  .names id_code_signal<31> id_reg_unit/inpvalue<31>

  1 1

  .names id_code_signal<30> id_reg_unit/inpvalue<30>

  1 1

  .names id_code_signal<29> id_reg_unit/inpvalue<29>

  1 1

  .names id_code_signal<28> id_reg_unit/inpvalue<28>

  1 1

  .names id_code_signal<27> id_reg_unit/inpvalue<27>

  1 1

  .names id_code_signal<26> id_reg_unit/inpvalue<26>

  1 1

  .names id_code_signal<25> id_reg_unit/inpvalue<25>

  1 1

  .names id_code_signal<24> id_reg_unit/inpvalue<24>

  1 1

  .names id_code_signal<23> id_reg_unit/inpvalue<23>

  1 1

  .names id_code_signal<22> id_reg_unit/inpvalue<22>

  1 1

  .names id_code_signal<21> id_reg_unit/inpvalue<21>

  1 1

  .names id_code_signal<20> id_reg_unit/inpvalue<20>

  1 1

  .names id_code_signal<19> id_reg_unit/inpvalue<19>

  1 1

  .names id_code_signal<18> id_reg_unit/inpvalue<18>

  1 1

  .names id_code_signal<17> id_reg_unit/inpvalue<17>

  1 1

  .names id_code_signal<16> id_reg_unit/inpvalue<16>

  1 1

  .names id_code_signal<15> id_reg_unit/inpvalue<15>

  1 1

  .names id_code_signal<14> id_reg_unit/inpvalue<14>

  1 1

  .names id_code_signal<13> id_reg_unit/inpvalue<13>

  1 1

  .names id_code_signal<12> id_reg_unit/inpvalue<12>

  1 1

  .names id_code_signal<11> id_reg_unit/inpvalue<11>

  1 1

  .names id_code_signal<10> id_reg_unit/inpvalue<10>

  1 1

  .names id_code_signal<9> id_reg_unit/inpvalue<9>

  1 1

  .names id_code_signal<8> id_reg_unit/inpvalue<8>

  1 1

  .names id_code_signal<7> id_reg_unit/inpvalue<7>

  1 1

  .names id_code_signal<6> id_reg_unit/inpvalue<6>

  1 1

  .names id_code_signal<5> id_reg_unit/inpvalue<5>

  1 1

  .names id_code_signal<4> id_reg_unit/inpvalue<4>

  1 1

  .names id_code_signal<3> id_reg_unit/inpvalue<3>

  1 1

  .names id_code_signal<2> id_reg_unit/inpvalue<2>

  1 1

  .names id_code_signal<1> id_reg_unit/inpvalue<1>

  1 1

  .names id_code_signal<0> id_reg_unit/inpvalue<0>

  1 1

  .names shiftdr_r id_reg_unit/shiftdr

  1 1

  .names idenable id_reg_unit/enable

  1 1

  .names tapstate_r<3> tapstate_r<2> tapstate_r<1> tapstate_r<0> Mux_9/muxtemp0

  1111 1

  1110 1

  1011 1

  1010 1

  1001 1

  1000 1

  0100 1

  .names Mux_9/muxtemp0 n47

  1 1

  .names tapstate_r<2> tapstate_r<1> tapstate_r<0> Mux_10/muxtemp0

  111 1

  101 1

  100 1

  001 1

  000 1

  .names Mux_10/muxtemp0 n48

  1 1

  .names tapstate_r<3> tapstate_r<2> tapstate_r<1> tapstate_r<0> Mux_11/muxtemp0

  1111 1

  1101 1

  1100 1

  0101 1

  0100 1

  .names Mux_11/muxtemp0 n49

  1 1

  .names tapstate_r<3> tapstate_r<2> tapstate_r<1> Mux_13/muxtemp0

  111 1

  110 1

  101 1

  100 1

  010 1

  .names Mux_13/muxtemp0 n51

  1 1

  .names tapstate_r<2> tapstate_r<1> tapstate_r<0> Mux_14/muxtemp0

  111 1

  101 1

  100 1

  .names Mux_14/muxtemp0 n52

  1 1

  .names tapstate_r<3> tapstate_r<2> tapstate_r<1> tapstate_r<0> Mux_15/muxtemp0

  1110 1

  1011 1

  1010 1

  1001 1

  1000 1

  0111 1

  0110 1

  0100 1

  0011 1

  0010 1

  0001 1

  0000 1

  .names Mux_15/muxtemp0 n53

  1 1

  .names n220 tapstate_r<3> reduce_nor_206/n1

  1- 1

  -1 1

  .names n47 tms n51 tapstate_nxt<3>

  11- 1

  -01 1

  .names n48 tms n52 tapstate_nxt<2>

  11- 1

  -01 1

  .names n49 tms n53 tapstate_nxt<1>

  11- 1

  -01 1

  .names n50 tms n54 tapstate_nxt<0>

  11- 1

  -01 1

  .names trst n59

  0 1

  .loc Configurable_U5.VHD 315 tapstate_r<1>

  .latch tapstate_nxt<1> tapstate_r<1> re tck 5 n59

  .loc Configurable_U5.VHD 315 tapstate_r<0>

  .latch tapstate_nxt<0> tapstate_r<0> re tck 5 n59

  .loc Configurable_U5.VHD 405 reset_r

  .latch reset_c reset_r re n102 4 n59

  .loc Configurable_U5.VHD 405 shiftir_r

  .latch shiftir_c shiftir_r re n102 4 n59

  .loc Configurable_U5.VHD 486 up_ireg<3>

  .latch sh_ireg<3> up_ireg<3> re tck 4 n144 updateir1

  .loc Configurable_U5.VHD 486 up_ireg<2>

  .latch sh_ireg<2> up_ireg<2> re tck 4 n144 updateir1

  .names reduce_nor_207/n1 n83

  0 1

  .names n2 n71 updateir1

  11 1

  .names reduce_nor_211/n2 n123

  0 1

  .subckt MUXF5 i222 I0=-i222/I0 I1=-i222/I1 S=-i222/S O=+n235

  .names n2 i222/I0

  1 1

  .names n85 i222/I1

  1 1

  .names tapstate_r<1> i222/S

  1 1

  .names n223 n71

  0 1

  .names n2 n76 clockdr1

  11 1

  .loc Configurable_U5.VHD 486 up_ireg<0>

  .latch sh_ireg<0> up_ireg<0> re tck 5 n144 updateir1

  .loc Configurable_U5.VHD 486 up_ireg<1>

  .latch sh_ireg<1> up_ireg<1> re tck 4 n144 updateir1

  .names n88 tapstate_r<1> n75

  11 1

  .names n75 n85 n76

  11 1

  .names n2 n80 clockir

  11 1

  .loc Configurable_U5.VHD 315 tapstate_r<2>

  .latch tapstate_nxt<2> tapstate_r<2> re tck 5 n59

  .names tapstate_r<3> tapstate_r<1> n79

  11 1

  .names n79 n85 n80

  11 1

  .names n2 n83 exit1dr1

  11 1

  .names n218 n216 reduce_nor_207/n1

  1- 1

  -1 1

  .names n120 ins<2> n215

  1- 1

  -1 1

  .names tapstate_r<0> n85

  0 1

  .names tapstate_r<1> n86

  0 1

  .names n85 n86 reduce_nor_51/n1

  1- 1

  -1 1

  .names tapstate_r<3> n88

  0 1

  .names n224 tapstate_r<2> reduce_nor_208/n1

  1- 1

  -1 1

  .loc Configurable_U5.VHD 469 sh_ireg<3>

  .latch n132 sh_ireg<3> re tck 2 clockir

  .loc Configurable_U5.VHD 469 sh_ireg<2>

  .latch n133 sh_ireg<2> re tck 2 clockir

  .names n218 n219 reduce_nor_204/n1

  1- 1

  -1 1

  .names n85 tapstate_r<1> n216

  1- 1

  -1 1

  .names n2 n111 controlen

  11 1

  .names tapstate_r<2> tapstate_r<3> n218

  1- 1

  -1 1

  .names n122 n116 n221

  1- 1

  -1 1

  .names tapstate_r<3> selectdi1

  1 1

  .loc Configurable_U5.VHD 469 sh_ireg<1>

  .latch n134 sh_ireg<1> re tck 2 clockir

  .names tck n102

  0 1

  .loc Configurable_U5.VHD 405 shiftdr_r

  .latch shiftdr_c shiftdr_r re n102 4 n59

  .names n221 n215 reduce_nor_209/n1

  1- 1

  -1 1

  .names n2 n66 updatedr1

  11 1

  .names reduce_nor_79/n3 n117

  0 1

  .names shiftdr_r shiftdr

  1 1

  .subckt MUXF5 i223 I0=-i223/I0 I1=-i223/I1 S=-i223/S O=+n236

  .names n2 i223/I0

  1 1

  .names n85 i223/I1

  1 1

  .names tapstate_r<1> i223/S

  1 1

  .subckt MUXF5 i224 I0=-i224/I0 I1=-i224/I1 S=-i224/S O=+n237

  .names n2 i224/I0

  1 1

  .names n85 i224/I1

  1 1

  .names tapstate_r<1> i224/S

  1 1

  .subckt MUXF5 i225 I0=-i225/I0 I1=-i225/I1 S=-i225/S O=+n238

  .names n2 i225/I0

  1 1

  .names n2 i225/I1

  1 1

  .names tapstate_r<1> i225/S

  1 1

  .names n116 ins<1> reduce_nor_79/n1

  1- 1

  -1 1

  .subckt MUXF6 i226 I0=-i226/I0 I1=-i226/I1 S=-i226/S O=+n239

  .names n235 i226/I0

  1 1

  .names n236 i226/I1

  1 1

  .names tapstate_r<2> i226/S

  1 1

  .names n2 n117 idenable

  11 1

  .names ins<0> n116

  0 1

  .names n121 n120 reduce_nor_211/n1

  1- 1

  -1 1

  .names n2 n123 bypasenable

  11 1

  .subckt MUXF6 i227 I0=-i227/I0 I1=-i227/I1 S=-i227/S O=+n240

  .names n237 i227/I0

  1 1

  .names n238 i227/I1

  1 1

  .names tapstate_r<2> i227/S

  1 1

  .names ins<1> n120

  0 1

  .names ins<2> n121

  0 1

  .names ins<3> n122

  0 1

  .names n215 ins<0> n217

  1- 1

  -1 1

  .names n2 n129 dataen

  11 1

  .names n87 n216 n220

  1- 1

  -1 1

  .names reduce_nor_212/n1 n129

  0 1

  .names n217 n122 reduce_nor_212/n1

  1- 1

  -1 1

  .loc Configurable_U5.VHD 545 byp_reg

  .latch n162 byp_reg re tck 2 clockdr1

  .names tapstate_r<0> n87 n54

  11 1

  .names tdi n131 n132

  11 1

  .names shiftir_r n131

  0 1

  .names sh_ireg<3> n131 n133

  11 1

  .names sh_ireg<2> n131 n134

  11 1

  .names shiftdr_r n267

  0 1

  .names n1 reduce_nor_208/n1 shiftir_c

  1- 1

  -1 1

  .names reduce_nor_79/n1 reduce_nor_79/n2 reduce_nor_79/n3

  1- 1

  -1 1

  .names n86 tapstate_r<0> n219

  1- 1

  -1 1

  .names reduce_nor_206/n1 n66

  0 1

  .names tdi n267 n162

  11 1

  .names ins<2> ins<3> reduce_nor_79/n2

  1- 1

  -1 1

  .names reset_r n144

  0 1

  .names sh_ireg<1> shiftir_r n135

  1- 1

  -1 1

  .names reduce_nor_209/n1 n111

  0 1

  .names n87 n88 reduce_nor_51/n2

  1- 1

  -1 1

  .names n219 n88 n224

  1- 1

  -1 1

  .names reduce_nor_51/n1 reduce_nor_51/n2 reduce_nor_51/n3

  1- 1

  -1 1

  .names n1 n222 reset

  1- 1

  -1 1

  .names n1 reduce_nor_51/n3 reset_c

  1- 1

  -1 1

  .loc Configurable_U5.VHD 315 tapstate_r<3>

  .latch tapstate_nxt<3> tapstate_r<3> re tck 5 n59

  .names up_ireg<3> ins<3>

  1 1

  .names up_ireg<2> ins<2>

  1 1

  .names up_ireg<1> ins<1>

  1 1

  .names up_ireg<0> ins<0>

  1 1

  .names sh_ireg<0> irso

  1 1

  .names irso selectdi1 drso tdo

  11- 1

  -01 1

  .names idout idenable drsin n159

  11- 1

  -01 1

  .names byp_reg bypasenable n159 drso

  11- 1

  -01 1

  .names n240 tapstate_r<3> n239 n50

  11- 1

  -01 1

  .names n1 reduce_nor_204/n1 shiftdr_c

  1- 1

  -1 1

  .names tapstate_r<2> n87

  0 1

  .names tapstate_r<2> tapstate<2>

  1 1

  .names tapstate_r<1> tapstate<1>

  1 1

  .names tapstate_r<0> tapstate<0>

  1 1

  .names ins<3> irout<3>

  1 1

  .names ins<2> irout<2>

  1 1

  .names ins<1> irout<1>

  1 1

  .names ins<0> irout<0>

  1 1

  .loc Configurable_U5.VHD 469 sh_ireg<0>

  .latch n135 sh_ireg<0> re tck 2 clockir

  .names n221 reduce_nor_211/n1 reduce_nor_211/n2

  1- 1

  -1 1