jsenella / 2017_TD2_projet5_veilleuse_connectee

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  .model FPGA_projet

  .inputs CLK_BRD

  .outputs HA2

  .outputs HA8

  .inputs JTAG_NEXUS_TCK

  .inputs JTAG_NEXUS_TDI

  .outputs JTAG_NEXUS_TDO

  .inputs JTAG_NEXUS_TMS

  .names U4/SA<0> U4/SB<0> n106

  11 1

  00 1

  .subckt MUXCY i11 CI=-i11/CI DI=-i11/DI S=-i11/S O=+n107

  .names U4/n1 i11/CI

  1 1

  .names U4/SB<0> i11/DI

  1 1

  .names n106 i11/S

  1 1

  .names PinSignal_U8_Q1 PinSignal_U6_O<1>

  1 1

  .names PinSignal_U8_Q0 PinSignal_U6_O<0>

  1 1

  .loc essai1.VHD 165

  .subckt CD4CES U8 C=-U8/C CE=-U8/CE CEO=+PinSignal_U8_CEO CLR=-U8/CLR Q0=+PinSignal_U8_Q0 Q1=+PinSignal_U8_Q1 Q2=+PinSignal_U8_Q2 Q3=+PinSignal_U8_Q3 TC=+PinSignal_U8_TC

  .names PinSignal_U3_FREQ U8/C

  1 1

  .names PowerSignal_VCC U8/CE

  1 1

  .names PowerSignal_GND U8/CLR

  1 1

  .loc essai1.VHD 179

  .subckt CD4CES U7 C=-U7/C CE=-U7/CE CEO=+$$COND0 CLR=-U7/CLR Q0=+PinSignal_U7_Q0 Q1=+PinSignal_U7_Q1 Q2=+PinSignal_U7_Q2 Q3=+PinSignal_U7_Q3 TC=+$$COND1

  .names PinSignal_U8_TC U7/C

  1 1

  .names PinSignal_U8_CEO U7/CE

  1 1

  .names PowerSignal_GND U7/CLR

  1 1

  .names U4/n1

  .loc essai1.VHD 205

  .subckt Configurable_U5 U5 AOUT<7>=+PinSignal_U5_AOUT<7> AOUT<6>=+PinSignal_U5_AOUT<6> AOUT<5>=+PinSignal_U5_AOUT<5> AOUT<4>=+PinSignal_U5_AOUT<4> AOUT<3>=+PinSignal_U5_AOUT<3> AOUT<2>=+PinSignal_U5_AOUT<2> AOUT<1>=+PinSignal_U5_AOUT<1> AOUT<0>=+PinSignal_U5_AOUT<0> TCK=-U5/TCK TMS=-U5/TMS TDI=-U5/TDI TRST=-U5/TRST TDO=+PinSignal_U5_TDO

  .names JTAG_NEXUS_TCK U5/TCK

  1 1

  .names JTAG_NEXUS_TMS U5/TMS

  1 1

  .names PinSignal_U3_TDO U5/TDI

  1 1

  .names NamedSignal_JTAG_NEXUS_TRST U5/TRST

  1 1

  .names U4/SA<1> U4/SB<1> n108

  11 1

  00 1

  .loc essai1.VHD 224

  .subckt CLKGEN U3 FREQ=+PinSignal_U3_FREQ TCK=-U3/TCK TDI=-U3/TDI TDO=+PinSignal_U3_TDO TIMEBASE=-U3/TIMEBASE TMS=-U3/TMS TRST=-U3/TRST

  .names JTAG_NEXUS_TCK U3/TCK

  1 1

  .names JTAG_NEXUS_TDI U3/TDI

  1 1

  .names CLK_BRD U3/TIMEBASE

  1 1

  .names JTAG_NEXUS_TMS U3/TMS

  1 1

  .names NamedSignal_JTAG_NEXUS_TRST U3/TRST

  1 1

  .loc essai1.VHD 236

  .subckt Configurable_U2 U2 D_B<7>=-U2/D_B<7> D_B<6>=-U2/D_B<6> D_B<5>=-U2/D_B<5> D_B<4>=-U2/D_B<4> D_B<3>=-U2/D_B<3> D_B<2>=-U2/D_B<2> D_B<1>=-U2/D_B<1> D_B<0>=-U2/D_B<0> Q_B<7>=+PinSignal_U2_Q_B<7> Q_B<6>=+PinSignal_U2_Q_B<6> Q_B<5>=+PinSignal_U2_Q_B<5> Q_B<4>=+PinSignal_U2_Q_B<4> Q_B<3>=+PinSignal_U2_Q_B<3> Q_B<2>=+PinSignal_U2_Q_B<2> Q_B<1>=+PinSignal_U2_Q_B<1> Q_B<0>=+PinSignal_U2_Q_B<0> C=-U2/C

  .names PinSignal_U6_O<7> U2/D_B<7>

  1 1

  .names PinSignal_U6_O<6> U2/D_B<6>

  1 1

  .names PinSignal_U6_O<5> U2/D_B<5>

  1 1

  .names PinSignal_U6_O<4> U2/D_B<4>

  1 1

  .names PinSignal_U6_O<3> U2/D_B<3>

  1 1

  .names PinSignal_U6_O<2> U2/D_B<2>

  1 1

  .names PinSignal_U6_O<1> U2/D_B<1>

  1 1

  .names PinSignal_U6_O<0> U2/D_B<0>

  1 1

  .names PinSignal_U3_FREQ U2/C

  1 1

  .loc essai1.VHD 244

  .subckt Configurable_U1 U1 D<7>=-U1/D<7> D<6>=-U1/D<6> D<5>=-U1/D<5> D<4>=-U1/D<4> D<3>=-U1/D<3> D<2>=-U1/D<2> D<1>=-U1/D<1> D<0>=-U1/D<0> C=-U1/C PWM=+PinSignal_U1_PWM

  .names PinSignal_U6_O<7> U1/D<7>

  1 1

  .names PinSignal_U6_O<6> U1/D<6>

  1 1

  .names PinSignal_U6_O<5> U1/D<5>

  1 1

  .names PinSignal_U6_O<4> U1/D<4>

  1 1

  .names PinSignal_U6_O<3> U1/D<3>

  1 1

  .names PinSignal_U6_O<2> U1/D<2>

  1 1

  .names PinSignal_U6_O<1> U1/D<1>

  1 1

  .names PinSignal_U6_O<0> U1/D<0>

  1 1

  .names CLK_BRD U1/C

  1 1

  .names PinSignal_U1_PWM HA2

  1 1

  .names PinSignal_U4_LT HA8

  1 1

  .names PinSignal_U5_TDO JTAG_NEXUS_TDO

  1 1

  .names PowerSignal_VCC NamedSignal_JTAG_NEXUS_TRST

  1 1

  .names PowerSignal_GND

  .names PowerSignal_VCC

  1

  .names PinSignal_U8_Q2 PinSignal_U6_O<2>

  1 1

  .names PinSignal_U8_Q3 PinSignal_U6_O<3>

  1 1

  .names PinSignal_U7_Q0 PinSignal_U6_O<4>

  1 1

  .names PinSignal_U7_Q1 PinSignal_U6_O<5>

  1 1

  .names PinSignal_U7_Q2 PinSignal_U6_O<6>

  1 1

  .names PinSignal_U7_Q3 PinSignal_U6_O<7>

  1 1

  .names U4/n2

  1

  .names PinSignal_U2_Q_B<7> U4/SA<7>

  1 1

  .names PinSignal_U2_Q_B<6> U4/SA<6>

  1 1

  .names PinSignal_U2_Q_B<5> U4/SA<5>

  1 1

  .names PinSignal_U2_Q_B<4> U4/SA<4>

  1 1

  .names PinSignal_U2_Q_B<3> U4/SA<3>

  1 1

  .names PinSignal_U2_Q_B<2> U4/SA<2>

  1 1

  .names PinSignal_U2_Q_B<1> U4/SA<1>

  1 1

  .names PinSignal_U2_Q_B<0> U4/SA<0>

  1 1

  .names PinSignal_U5_AOUT<7> U4/SB<7>

  1 1

  .names PinSignal_U5_AOUT<6> U4/SB<6>

  1 1

  .names PinSignal_U5_AOUT<5> U4/SB<5>

  1 1

  .names PinSignal_U5_AOUT<4> U4/SB<4>

  1 1

  .names PinSignal_U5_AOUT<3> U4/SB<3>

  1 1

  .names PinSignal_U5_AOUT<2> U4/SB<2>

  1 1

  .names PinSignal_U5_AOUT<1> U4/SB<1>

  1 1

  .names PinSignal_U5_AOUT<0> U4/SB<0>

  1 1

  .names U4/n2 U4/n20 PinSignal_U4_LT

  11 1

  .subckt MUXCY i13 CI=-i13/CI DI=-i13/DI S=-i13/S O=+n109

  .names n107 i13/CI

  1 1

  .names U4/SB<1> i13/DI

  1 1

  .names n108 i13/S

  1 1

  .names U4/SA<2> U4/SB<2> n110

  11 1

  00 1

  .subckt MUXCY i15 CI=-i15/CI DI=-i15/DI S=-i15/S O=+n111

  .names n109 i15/CI

  1 1

  .names U4/SB<2> i15/DI

  1 1

  .names n110 i15/S

  1 1

  .names U4/SA<3> U4/SB<3> n112

  11 1

  00 1

  .subckt MUXCY i17 CI=-i17/CI DI=-i17/DI S=-i17/S O=+n113

  .names n111 i17/CI

  1 1

  .names U4/SB<3> i17/DI

  1 1

  .names n112 i17/S

  1 1

  .names U4/SA<4> U4/SB<4> n114

  11 1

  00 1

  .subckt MUXCY i19 CI=-i19/CI DI=-i19/DI S=-i19/S O=+n115

  .names n113 i19/CI

  1 1

  .names U4/SB<4> i19/DI

  1 1

  .names n114 i19/S

  1 1

  .names U4/SA<5> U4/SB<5> n116

  11 1

  00 1

  .subckt MUXCY i21 CI=-i21/CI DI=-i21/DI S=-i21/S O=+n117

  .names n115 i21/CI

  1 1

  .names U4/SB<5> i21/DI

  1 1

  .names n116 i21/S

  1 1

  .names U4/SA<6> U4/SB<6> n118

  11 1

  00 1

  .subckt MUXCY i23 CI=-i23/CI DI=-i23/DI S=-i23/S O=+n119

  .names n117 i23/CI

  1 1

  .names U4/SB<6> i23/DI

  1 1

  .names n118 i23/S

  1 1

  .names U4/SA<7> U4/SB<7> n120

  11 1

  00 1

  .subckt MUXCY i25 CI=-i25/CI DI=-i25/DI S=-i25/S O=+U4/n20

  .names n119 i25/CI

  1 1

  .names U4/SB<7> i25/DI

  1 1

  .names n120 i25/S

  1 1