Blame view

RIOT/boards/msb-430h/include/periph_conf.h 2.19 KB
a752c7ab   elopes   add first test an...
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
  /*
   * Copyright (C) 2014 INRIA
   *               2015 Freie Universitรคt Berlin
   *
   * This file is subject to the terms and conditions of the GNU Lesser General
   * Public License v2.1. See the file LICENSE in the top level directory for more
   * details.
   */
  
  /**
   * @ingroup     boards_msb430h
   * @{
   *
   * @file
   * @brief       MSB-430h peripheral configuration
   *
   * @author      Oliver Hahm <oliver.hahm@inria.fr>
   * @author      Hauke Petersen <hauke.petersen@fu-berlin.de>
   */
  
  #ifndef PERIPH_CONF_H
  #define PERIPH_CONF_H
  
  #include "periph_cpu.h"
  
  #ifdef __cplusplus
  extern "C" {
  #endif
  
  /**
   * @name    Clock configuration
   * @{
   */
  /** @todo   Move all clock configuration code here from the board.h */
  #define CLOCK_CORECLOCK     (7372800U)
  
  #define CLOCK_CMCLK         CLOCK_CORECLOCK     /* no divider programmed */
  /** @} */
  
  /**
   * @name    Timer configuration
   * @{
   */
  #define TIMER_NUMOF         (1U)
  #define TIMER_BASE          (TIMER_A)
  #define TIMER_CHAN          (3)
  #define TIMER_ISR_CC0       (TIMERA0_VECTOR)
  #define TIMER_ISR_CCX       (TIMERA1_VECTOR)
  /** @} */
  
  /**
   * @name    UART configuration
   * @{
   */
  #define UART_NUMOF          (1U)
  #define UART_0_EN           (1U)
  
  #define UART_BASE           (USART_1)
  #define UART_IE             (SFR->IE2)
  #define UART_IF             (SFR->IFG2)
  #define UART_IE_RX_BIT      (1 << 4)
  #define UART_IE_TX_BIT      (1 << 5)
  #define UART_ME             (SFR->ME2)
  #define UART_ME_BITS        (0x30)
  #define UART_PORT           (PORT_3)
  #define UART_RX_PIN         (1 << 6)
  #define UART_TX_PIN         (1 << 7)
  #define UART_RX_ISR         (USART1RX_VECTOR)
  #define UART_TX_ISR         (USART1TX_VECTOR)
  /** @} */
  
  /**
   * @name    SPI configuration
   * @{
   */
  #define SPI_NUMOF           (1U)
  
  /* SPI configuration */
  #define SPI_BASE            (USART_0)
  #define SPI_IE              (SFR->IE1)
  #define SPI_IF              (SFR->IFG1)
  #define SPI_IE_RX_BIT       (1 << 6)
  #define SPI_IE_TX_BIT       (1 << 7)
  #define SPI_ME              (SFR->ME1)
  #define SPI_ME_BIT          (1 << 6)
  #define SPI_PIN_MISO        GPIO_PIN(P3,2)
  #define SPI_PIN_MOSI        GPIO_PIN(P3,1)
  #define SPI_PIN_CLK         GPIO_PIN(P3,3)
  /** @} */
  
  #ifdef __cplusplus
  }
  #endif
  
  #endif /* PERIPH_CONF_H */