a752c7ab
 elopes
add first test an...
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/*
* Copyright 2016, Imagination Technologies Limited and/or its
* affiliated group companies.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*
*/
/**
* @defgroup boards_mips-malta MIPS MALTA
* @ingroup boards
* @brief peripheral configuration for the MIPS Malta FPGA system
* @{
*
* @file
* @brief peripheral configuration for the MIPS Malta FPGA system
*
* @author Neil Jones <neil.jones@imgtec.com>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Timer definitions
* @{
*/
#define TIMER_NUMOF (1)
#define TIMER_0_CHANNELS (3)
/** @} */
/**
* @brief No UART driver for this board currently
* Note this value must be set though (to 0)
*/
#define UART_NUMOF (0)
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H */
/** @} */
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