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RIOT/cpu/stellaris_common/include/vendor/hw_sysexc.h 7.35 KB
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  //*****************************************************************************
  //
  // hw_sysexc.h - Macros used when accessing the system exception module.
  //
  // Copyright (c) 2011-2012 Texas Instruments Incorporated.  All rights reserved.
  // Software License Agreement
  //
  //   Redistribution and use in source and binary forms, with or without
  //   modification, are permitted provided that the following conditions
  //   are met:
  //
  //   Redistributions of source code must retain the above copyright
  //   notice, this list of conditions and the following disclaimer.
  //
  //   Redistributions in binary form must reproduce the above copyright
  //   notice, this list of conditions and the following disclaimer in the
  //   documentation and/or other materials provided with the
  //   distribution.
  //
  //   Neither the name of Texas Instruments Incorporated nor the names of
  //   its contributors may be used to endorse or promote products derived
  //   from this software without specific prior written permission.
  //
  // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  //
  // This is part of revision 9453 of the Stellaris Firmware Development Package.
  //
  //*****************************************************************************
  
  #ifndef STELLARIS_HW_SYSEXC_H
  #define STELLARIS_HW_SYSEXC_H
  
  #ifdef __cplusplus
  extern "C" {
  #endif
  
  //*****************************************************************************
  //
  // The following are defines for the System Exception Module register
  // addresses.
  //
  //*****************************************************************************
  #define SYSEXC_RIS              0x400F9000  // System Exception Raw Interrupt
                                              // Status
  #define SYSEXC_IM               0x400F9004  // System Exception Interrupt Mask
  #define SYSEXC_MIS              0x400F9008  // System Exception Masked
                                              // Interrupt Status
  #define SYSEXC_IC               0x400F900C  // System Exception Interrupt Clear
  
  //*****************************************************************************
  //
  // The following are defines for the bit fields in the SYSEXC_RIS register.
  //
  //*****************************************************************************
  #define SYSEXC_RIS_FPIXCRIS     0x00000020  // Floating-Point Inexact Exception
                                              // Raw Interrupt Status
  #define SYSEXC_RIS_FPOFCRIS     0x00000010  // Floating-Point Overflow
                                              // Exception Raw Interrupt Status
  #define SYSEXC_RIS_FPUFCRIS     0x00000008  // Floating-Point Underflow
                                              // Exception Raw Interrupt Status
  #define SYSEXC_RIS_FPIOCRIS     0x00000004  // Floating-Point Invalid Operation
                                              // Raw Interrupt Status
  #define SYSEXC_RIS_FPDZCRIS     0x00000002  // Floating-Point Divide By 0
                                              // Exception Raw Interrupt Status
  #define SYSEXC_RIS_FPIDCRIS     0x00000001  // Floating-Point Input Denormal
                                              // Exception Raw Interrupt Status
  
  //*****************************************************************************
  //
  // The following are defines for the bit fields in the SYSEXC_IM register.
  //
  //*****************************************************************************
  #define SYSEXC_IM_FPIXCIM       0x00000020  // Floating-Point Inexact Exception
                                              // Interrupt Mask
  #define SYSEXC_IM_FPOFCIM       0x00000010  // Floating-Point Overflow
                                              // Exception Interrupt Mask
  #define SYSEXC_IM_FPUFCIM       0x00000008  // Floating-Point Underflow
                                              // Exception Interrupt Mask
  #define SYSEXC_IM_FPIOCIM       0x00000004  // Floating-Point Invalid Operation
                                              // Interrupt Mask
  #define SYSEXC_IM_FPDZCIM       0x00000002  // Floating-Point Divide By 0
                                              // Exception Interrupt Mask
  #define SYSEXC_IM_FPIDCIM       0x00000001  // Floating-Point Input Denormal
                                              // Exception Interrupt Mask
  
  //*****************************************************************************
  //
  // The following are defines for the bit fields in the SYSEXC_MIS register.
  //
  //*****************************************************************************
  #define SYSEXC_MIS_FPIXCMIS     0x00000020  // Floating-Point Inexact Exception
                                              // Masked Interrupt Status
  #define SYSEXC_MIS_FPOFCMIS     0x00000010  // Floating-Point Overflow
                                              // Exception Masked Interrupt
                                              // Status
  #define SYSEXC_MIS_FPUFCMIS     0x00000008  // Floating-Point Underflow
                                              // Exception Masked Interrupt
                                              // Status
  #define SYSEXC_MIS_FPIOCMIS     0x00000004  // Floating-Point Invalid Operation
                                              // Masked Interrupt Status
  #define SYSEXC_MIS_FPDZCMIS     0x00000002  // Floating-Point Divide By 0
                                              // Exception Masked Interrupt
                                              // Status
  #define SYSEXC_MIS_FPIDCMIS     0x00000001  // Floating-Point Input Denormal
                                              // Exception Masked Interrupt
                                              // Status
  
  //*****************************************************************************
  //
  // The following are defines for the bit fields in the SYSEXC_IC register.
  //
  //*****************************************************************************
  #define SYSEXC_IC_FPIXCIC       0x00000020  // Floating-Point Inexact Exception
                                              // Interrupt Clear
  #define SYSEXC_IC_FPOFCIC       0x00000010  // Floating-Point Overflow
                                              // Exception Interrupt Clear
  #define SYSEXC_IC_FPUFCIC       0x00000008  // Floating-Point Underflow
                                              // Exception Interrupt Clear
  #define SYSEXC_IC_FPIOCIC       0x00000004  // Floating-Point Invalid Operation
                                              // Interrupt Clear
  #define SYSEXC_IC_FPDZCIC       0x00000002  // Floating-Point Divide By 0
                                              // Exception Interrupt Clear
  #define SYSEXC_IC_FPIDCIC       0x00000001  // Floating-Point Input Denormal
                                              // Exception Interrupt Clear
  #ifdef __cplusplus
  }
  #endif
  
  #endif /* STELLARIS_HW_SYSEXC_H */