6663b6c9
adorian
projet complet av...
|
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
|
#ifndef REGS_FSMC_H
#define REGS_FSMC_H
#include "register.h"
class FSMC {
public:
class BCR : Register32 {
public:
enum class MTYP : uint8_t {
SRAM = 0,
PSRAM = 1,
NOR = 2
};
enum class MWID : uint8_t {
EIGHT_BITS = 0,
SIXTEEN_BITS = 1
};
REGS_BOOL_FIELD(MBKEN, 0);
REGS_BOOL_FIELD(MUXEN, 1);
REGS_TYPE_FIELD(MTYP, 3, 2);
REGS_TYPE_FIELD(MWID, 5, 4);
REGS_BOOL_FIELD(WREN, 12);
REGS_BOOL_FIELD(EXTMOD, 14);
};
class BTR : Register32 {
public:
enum class ACCMOD : uint8_t {
A = 0,
B = 1,
C = 2,
D = 3
};
REGS_FIELD(ADDSET, uint8_t, 3, 0);
REGS_FIELD(ADDHLD, uint8_t, 7, 4);
REGS_FIELD(DATAST, uint8_t, 15, 8);
REGS_FIELD(BUSTURN, uint8_t, 19, 16);
REGS_FIELD(CLKDIV, uint8_t, 23, 20);
REGS_FIELD(DATLAT, uint8_t, 27, 24);
REGS_TYPE_FIELD(ACCMOD, 29, 28);
};
class BWTR : Register32 {
public:
enum class ACCMOD : uint8_t {
A = 0,
B = 1,
C = 2,
D = 3
};
REGS_FIELD(ADDSET, uint8_t, 3, 0);
REGS_FIELD(ADDHLD, uint8_t, 7, 4);
REGS_FIELD(DATAST, uint8_t, 15, 8);
REGS_FIELD(BUSTURN, uint8_t, 19, 16);
REGS_FIELD(CLKDIV, uint8_t, 23, 20);
REGS_FIELD(DATLAT, uint8_t, 27, 24);
REGS_TYPE_FIELD(ACCMOD, 29, 28);
};
constexpr FSMC() {}
volatile BCR * BCR(int index) const {
return (class BCR *)(Base() + 8*(index-1));
}
volatile BTR * BTR(int index) const {
return (class BTR *)(Base() + 4 + 8*(index-1));
}
volatile BWTR * BWTR(int index) const {
return (class BWTR *)(Base() + 0x104 + 8*(index-1));
}
private:
constexpr uint32_t Base() const {
return 0xA0000000;
};
};
constexpr FSMC FSMC;
#endif
|